sampling gate
英 [ˈsɑːmplɪŋ ɡeɪt]
美 [ˈsæmplɪŋ ɡeɪt]
取样选通电路
双语例句
- The circuit simulation shows that the symmetric strobe design ensures that the sampling interval is 100 ps and the sampling gate bandwidth is 4.4 GHz when the strobe pulse width is 100 ps. The gate can be used in multi-beam ultrashort laser pulses sampling.
电路仿真结果表明，对称的选通设计保证了选通脉宽为100ps时，取样间隔也为100ps，取样门带宽为4.4GHz，可应用于多路超短激光脉冲取样。 - Frequency characteristic of single tube sampling gate acted by cosinusoidal model sampling pulse
余弦型取样脉冲作用下单管取样门的频率特性 - Modeling and simulation of sampling gate based on high-speed schottky diodes
高速肖特基二极管取样门建模与仿真 - A new balanced sampling gate based on monolithic Schottky bridge quad diodes is put forward in this paper as well as its model and circuit design.
提出了一种新颖的基于肖特基二极管桥的平衡取样门，给出其模型和具体电路设计。 - A high-speed sampling system for echo signal of impulse GPR based on equivalent time sampling method is presented, and significant circuits including step sampling pulse generator and sampling gate circuit are designed.
提出了一种基于等效时间采样方法的冲击型探地雷达回波信号高速采样系统，设计实现了等效时间采样的关键电路，包括步进采样脉冲发生器、采样门电路。 - In this paper, an image sampling system with FPGA ( Field Programmable Gate Array) was designed to improve the image sampling part of the old model SEM.
本文提出了一种基于FPGA（现场可编程门阵列）技术的图像采集系统设计方案，用于升级老型号SEM图像采集功能。 - The design method for the efficient time-varying network architecture of the fractional multiple sampling rate converter is presented and its field programmable gate array ( FPGA) is implemented.
提出了分数倍抽样率转换器的高效时变网络结构的设计方法，并用现场可编程门阵列（FPGA）实现。 - The experiment shows that this trigger scheme can fully collect the whole output signals of the wire chamber for the random cosmic ray events and get rid of the problem of signal loss caused by the delay of sampling gate.
实验证明，这种方法能完整地收集随机出现的宇宙线事例信号的全部电荷，解决了由于取样门延迟打开所造成的信号电荷丢失问题。 - The representative of sampling is improved by using the method based on uniform probability sampling, which is used to calculate the size and form of tracking gate.
采用概率均匀采样的方法来提高状态分布模拟采样的代表性，并用于计算跟踪门的大小和形状。 - By sampling the output voltage, the system can control the oscillator frequency to stabilize the output current; or according the feedback voltage, the system can decide the number of skip cycle of the power transistor gate signal to stabilize the output voltage.
系统通过对输出电压的反馈采样，控制内部振荡器的频率，使输出电流恒定；或根据反馈电压，调整功率管栅信号的跳周期个数，使输出电压恒定。